1. Technical Field
This disclosure generally relates to a constant-voltage circuit and a controlling method thereof in which a response speed can be fast and overshooting of an output voltage from the circuit and an oscillation of the circuit are restrained when the output voltage is suddenly decreased caused by a change of a load to the circuit.
2. Description of the Related Art
Generally, an error amplifier in a constant-voltage circuit provides a frequency compensation circuit which performs phase compensation in order to avoid unstable operations such as an oscillation of the circuit.
FIG. 3 is a circuit diagram of a constant-voltage circuit.
In a constant-voltage circuit 100 shown in FIG. 3, an error amplifier AMPa provides NMOS transistors M103 and M104 which form a differential pair, PMOS transistors M105 and M106 which form a current mirror circuit and become a load to the differential pair, and an NMOS transistor M102 which is a constant-current source for supplying a bias current to the differential pair. Further, the error amplifier AMPa provides an output circuit section formed of a PMOS transistor M107 and an NMOS transistor M108 and a frequency compensation circuit formed of a resistor R103 and a capacitor C101.
In the error amplifier AMPa, an output voltage Vout is divided by resistors R101 and R102 so that a divided voltage VFBa is input to the gate of the NMOS transistor M104 which gate is a non-inverting input terminal. A predetermined reference voltage Vs from a reference voltage generating circuit 101 is input to the gate of the NMOS transistor M103 which gate is an inverting input terminal. The error amplifier AMPa controls operations of an output voltage control transistor M101 so that the divided voltage VFBa becomes the reference voltage Vs and controls a current to be output to a load from the output voltage control transistor M101.
Generally, the error amplifier AMPa in the constant-voltage circuit 100 is designed so that a direct-current characteristic becomes excellent. Therefore, a direct-current gain is designed to be as large as possible; consequently, a bias current which is supplied to the differential pair is determined to be small. Accordingly, it takes time to charge/discharge the capacitor C101 for frequency compensation and input capacitance of the output voltage control transistor M101. Consequently, a response speed for a sudden change of an input voltage Vin and for a sudden change of a load current becomes slow.
In order to solve the above problem, a method is disclosed in which method a decrease of an output voltage caused by a sudden increase of a load current is rapidly compensated for. In the method, only alternating-current components of the change of the output voltage are detected by a coupling capacitor, a current is supplied to a load from a power source voltage by an auxiliary transistor which is separately disposed from the output transistor. With this, the decrease of the output voltage is compensated for. The method is disclosed in, for example, Patent Documents 1 and 2.
[Patent Document 1] Japanese Laid-Open Patent Application No. 2000-47740
[Patent Document 2] Japanese Laid-Open Patent Application No. 2000-242344
However, in the above method, since there is a limitation in detecting the speed of the change of the output voltage, the decrease of the output voltage caused by the change of the load cannot be sufficiently restrained.